A DRAM based Physical Unclonable Function (PUF) utilizing the location of weak retention cells is demonstrated in 65nm CMOS. A new authentication scheme is proposed for the DRAM PUF where a random pattern is written to a small section of the DRAM and then retention failures are induced. To further increase the number of Challenge Response Pairs (CPRs), the data pattern including retention failures is transferred to a different memory location where additional retention failures are induced. This scheme enables more than 1032 unique CRPs from a 1Kbit array. To improve the stability of the PUF response, a zero-overhead repetitive write-back technique along with bit-masking was utilized. Voltage and temperature induced instabilities were mitigated by adjusting the read reference voltage and refresh time before each authentication operation. The proposed DRAM PUF has a bit cell area of 0.68μm2.
|Original language||English (US)|
|Title of host publication||38th Annual Custom Integrated Circuits Conference|
|Subtitle of host publication||A Showcase for Integrated Circuit Design in Silicon Hills, CICC 2017|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|State||Published - Jul 26 2017|
|Event||38th Annual Custom Integrated Circuits Conference, CICC 2017 - Austin, United States|
Duration: Apr 30 2017 → May 3 2017
|Name||Proceedings of the Custom Integrated Circuits Conference|
|Other||38th Annual Custom Integrated Circuits Conference, CICC 2017|
|Period||4/30/17 → 5/3/17|
Bibliographical noteFunding Information:
This work was supported in part by the National Science Foundation under Grant CNS-1441639, and in part by the Semiconductor Research Corporation under Contract 2014-TS-2560.
© 2017 IEEE.