Abstract
The transistor sizing problem of minimizing the circuit area, subject to the circuit delay being less than a given specification, is formulated as a convex programming problem. An efficient convex programming algorithm is then used to obtain the exact solution. Experimental results on a variety of circuits show that, for a given delay specification, this approach is able to produce circuits with significantly smaller area when compared with TILOS.
| Original language | English (US) |
|---|---|
| Title of host publication | 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers |
| Publisher | Publ by IEEE |
| Pages | 482-485 |
| Number of pages | 4 |
| ISBN (Print) | 0818621575 |
| State | Published - Dec 1 1992 |
| Event | 1991 IEEE International Conference on Computer-Aided Design - ICCAD-91 - Santa Clara, CA, USA Duration: Nov 11 1991 → Nov 14 1991 |
Other
| Other | 1991 IEEE International Conference on Computer-Aided Design - ICCAD-91 |
|---|---|
| City | Santa Clara, CA, USA |
| Period | 11/11/91 → 11/14/91 |