A compact fast elliptic curve crypto coprocessor with variable key size is introduced. The device uses the internal SRAM/registers in an FPGA. Experimental results show that the design can achieve a high utilization of CLBs for the Xilinx 4000 series.
|Original language||English (US)|
|Number of pages||2|
|Journal||IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings|
|State||Published - Dec 1 1999|