@inproceedings{a7d0d9fc877249a3906d6ca18cd7cbd1,
title = "A C to hardware/software compiler",
abstract = "Improvements in the FPGA technology have resulted in introduction of reconfigurable computing machines, where the hardware adapts itself to the running application to gain speedup. This paper presents a top-down compilation method, under development, for such systems. We compile a C program into hierarchical VHDL source files, and annotate them with the placement information of the hardware modules to be configured on the FPGA. Static scheduling combined with a fast, two-stage placement core reduces the compilation time of large programs to minutes.",
author = "Kiarash Bazargan and Ryan Kastner and Seda Ogrenci and Majid Sarrafzadeh",
year = "2000",
month = jan,
day = "1",
doi = "10.1109/FPGA.2000.903440",
language = "English (US)",
series = "IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "331--332",
editor = "Hutchings, {Brad L.}",
booktitle = "Proceedings - 2000 IEEE Symposium on Field-Programmable Custom Computing Machines",
note = "IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2000 ; Conference date: 17-04-2000 Through 19-04-2000",
}