A bit-by-bit re-writable Eflash in a generic logic process for moderate-density embedded non-volatile memory applications

Seung Hwan Song, Ki Chul Chun, Chris H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

A bit-by-bit re-writable embedded flash memory is demonstrated in a generic 65nm logic process for moderate-density embedded non-volatile memory applications. The proposed 6T embedded flash memory cell improves the overall cell endurance by eliminating redundant program/erase cycles without disturbing cells in the unselected wordlines. A multistory high voltage switch utilizes four boosted supply levels generated by a compact voltage doubler based on-chip negative charge pump.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781467361460
DOIs
StatePublished - Nov 7 2013
Event35th Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2013 - San Jose, CA, United States
Duration: Sep 22 2013Sep 25 2013

Other

Other35th Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2013
CountryUnited States
CitySan Jose, CA
Period9/22/139/25/13

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Song, S. H., Chun, K. C., & Kim, C. H. (2013). A bit-by-bit re-writable Eflash in a generic logic process for moderate-density embedded non-volatile memory applications. In Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013 [6658453] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CICC.2013.6658453