A 5Gb/s 2×2 MIMO crosstalk cancellation scheme for high-speed I/Os

Taehyoun Oh, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

We describe a multiple-input multiple-output crosstalk cancellation (MIMO-XTC) architecture, particularly applicable to single-ended I/O. The MIMO architecture efficiently cancels crosstalk and improves jitter and eye-opening at the same time. A continuous-time prototype design was fabricated using a 130nm CMOS process and occupies 0.03mm2 of die area. The XTC equalizer performance has been verified for a variety of FR4 channel spacings and data rates. Measured eye diagrams show that the jitterpp reduces by 67%UI and the vertical eye opening increases by 58.2% at 5Gb/s. The prototype MIMO-XTC circuit consumes 2.8 mW/Gbps/lane which is roughly 2 times lower than other XTC schemes.

Original languageEnglish (US)
Title of host publicationIEEE Custom Integrated Circuits Conference 2010, CICC 2010
DOIs
StatePublished - Dec 13 2010
Event32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010 - San Jose, CA, United States
Duration: Sep 19 2010Sep 22 2010

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Other

Other32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010
CountryUnited States
CitySan Jose, CA
Period9/19/109/22/10

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Oh, T., & Harjani, R. (2010). A 5Gb/s 2×2 MIMO crosstalk cancellation scheme for high-speed I/Os. In IEEE Custom Integrated Circuits Conference 2010, CICC 2010 [5617599] (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2010.5617599