A 3D miniaturization method for low impedance designs

S. Riki Banerjee; Rhonda Franklin Drayton

doi:10.1109/SPI.2005.1500902

A 3D miniaturization method for low impedance designs

S. Riki Banerjee, Rhonda Franklin Drayton

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 μm deep V structure produces a 33.8 Ω line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 Ω microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.

Original language	English (US)
Title of host publication	Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005
Pages	71-74
Number of pages	4
DOIs	https://doi.org/10.1109/SPI.2005.1500902
State	Published - 2005
Event	9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005 - Garmisch-Partenkirchen, Germany Duration: May 10 2005 → May 13 2005

Publication series

Name	Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005
Volume	2005

Other

Other	9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005
Country/Territory	Germany
City	Garmisch-Partenkirchen
Period	5/10/05 → 5/13/05

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10.1109/SPI.2005.1500902

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A 3D miniaturization method for low impedance designs. / Banerjee, S. Riki; Drayton, Rhonda Franklin.
Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005. 2005. p. 71-74 1500902 (Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Banerjee, SR & Drayton, RF 2005, A 3D miniaturization method for low impedance designs. in Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005., 1500902, Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005, vol. 2005, pp. 71-74, 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005, Garmisch-Partenkirchen, Germany, 5/10/05. https://doi.org/10.1109/SPI.2005.1500902

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title = "A 3D miniaturization method for low impedance designs",

abstract = "Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 μm deep V structure produces a 33.8 Ω line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 Ω microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.",

author = "Banerjee, {S. Riki} and Drayton, {Rhonda Franklin}",

year = "2005",

doi = "10.1109/SPI.2005.1500902",

language = "English (US)",

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series = "Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005",

pages = "71--74",

booktitle = "Proceedings - 9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005",

note = "9th IEEE Workshop on Signal Propagation on Interconnects, SPI 2005 ; Conference date: 10-05-2005 Through 13-05-2005",

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AB - Microstrip interconnects with a V conductor are designed, fabricated, and measured to provide a compact solution for designs requiring low characteristic impedance lines. S-parameter curves are shown up to 35 GHz for 0.5 cm long designs. The 308 μm deep V structure produces a 33.8 Ω line with strong standing waves and reflections under 5 dB. To further reduce the impedance, a partial shield is added that results in 6.7 times reduction of signal line width, near elimination of open end effect, and excellent correlation with a standard 15 Ω microstrip up to 25 GHz. A filter demonstration shows near ideal behavior in 3 dB response and low return loss when compared to a similar design.

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ER -

A 3D miniaturization method for low impedance designs

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