A 32Gb/s Digital-Intensive Single-Ended PAM-4 Transceiver for High-Speed Memory Interfaces Featuring a 2-Tap Time-Based Decision Feedback Equalizer and an In-Situ Channel-Loss Monitor

Po Wei Chiu, Chris Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Single-ended transceivers that can deliver high-data rates at reduced supply voltages are required to meet the ever-growing demands of future memory interfaces. The performance of conventional non-return-to-zero (NRZ) links is usually limited by inter-symbol-interference (ISI) noise caused by high channel losses. Alternative schemes such as duobinary [1], three or four level pulse amplitude modulation (PAM-3, PAM-4) [2], and multi-band signaling [3] were proposed to increase bandwidth efficiency. In particular, PAM-4 signaling utilizes four signal levels to send 2b per unit interval, at the expense of complex TX and RX circuits resulting in higher power consumption and larger chip area. While this approach has been gaining popularity for ultra-high speed (>50Gb/s) links, a more compact implementation is needed for memory interface applications. In this paper, we propose a digital-intensive PAM-4 receiver targeted at memory interfaces; time-based circuits are used for the decision feedback equalization (DFE). Unlike traditional current-mode logic, time-based circuits can be realized using inverters and programmable loads, making them ideally-suited for low-voltage energy-efficient memory interfaces.

Original languageEnglish (US)
Title of host publication2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages336-338
Number of pages3
ISBN (Electronic)9781728132044
DOIs
StatePublished - Feb 2020
Event2020 IEEE International Solid-State Circuits Conference, ISSCC 2020 - San Francisco, United States
Duration: Feb 16 2020Feb 20 2020

Publication series

NameDigest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume2020-February
ISSN (Print)0193-6530

Conference

Conference2020 IEEE International Solid-State Circuits Conference, ISSCC 2020
CountryUnited States
CitySan Francisco
Period2/16/202/20/20

Bibliographical note

Funding Information:
This research was supported in part by the National Science Foundation under award number CCF-1763761.

Publisher Copyright:
© 2020 IEEE.

Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.

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