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A 3-D miniaturization method for low-impedance designs
S. Riki Banerjee
, Chenglin Zheng
,
Rhonda Franklin Drayton
Electrical and Computer Engineering
Research output
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peer-review
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Keyphrases
Signal Line
100%
Under-five
100%
S-parameters
100%
Parameter Curve
100%
Microstrip Interconnects
100%
Time Reduction
100%
Low Impedance
100%
Microstrip
100%
Standing Wave
100%
Low Return Loss
100%
V-structure
100%
End Effect
100%
Compact Solutions
100%
Miniaturization Technique
100%
Open-end
100%
Low Characteristic Impedance
100%
Deep-V
100%
Impedance Line
100%
Conventional Design
100%
Engineering
microstrip
100%
End Effect
50%
Interconnects
50%
Line Width
50%
Scattering Parameters
50%
Return Loss
50%
Open End
50%
Signal Line
50%
Characteristic Impedance
50%
Impedances Line
50%
Standing Wave
50%