A 24-GHz phased-array receiver in 0.13-μm CMOS using an 8-GHz LO

Satwik Patnaik, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Scopus citations

Abstract

This paper presents a 24-GHz two-channel phased-array receiver. The receiver adopts the LO-phase-shifting approach and employs a sub-harmonically injection-locked phase-shifter. A CMOS-only prototype, fabricated in a 130-nm SiGe BiCMOS technology, draws 16-mA of current from a 1.5-V supply and consists of a injection-locked oscillator (operating as a phase-shifter, LO-buffer and frequency multiplier), a down-conversion mixer and an IF-buffer. The worst-case measured amplitude and phase errors are 1.5-dB and 4°. The two-channel receiver occupies an active area of 0.23-mm2.

Original languageEnglish (US)
Title of host publicationProceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010
Pages465-468
Number of pages4
DOIs
StatePublished - Jul 16 2010
Event2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010 - Anaheim, CA, United States
Duration: May 23 2010May 25 2010

Publication series

NameDigest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN (Print)1529-2517

Other

Other2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010
CountryUnited States
CityAnaheim, CA
Period5/23/105/25/10

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Keywords

  • CMOS
  • Injection-locked oscillator (ILO)
  • Mm-wave
  • Phased-array
  • Sub-harmonic injection-locking

Cite this

Patnaik, S., & Harjani, R. (2010). A 24-GHz phased-array receiver in 0.13-μm CMOS using an 8-GHz LO. In Proceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010 (pp. 465-468). [10.1109/RFIC.2010.5477267] (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium). https://doi.org/10.1109/RFIC.2010.5477267