A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer

Keyphrases

• Ultra-low Power 100%
• Time-based 100%
• Time-to-digital Converter 100%
• In-package 100%
• Serial Link 100%
• Digital Equalizer 100%
• Energy Efficiency 50%
• In Situ 50%
• Proposed Design 50%
• Time Delay 50%
• Bit Error Rate 50%
• High Resilience 50%
• 65nm CMOS 50%
• Monitoring Circuit 50%
• Eye Diagram 50%
• Voltage Headroom 50%
• Time Amplifier 50%
• Delay-line-based 50%
• Digital Intensive 50%
• Bathtub Curve 50%
• Digital Equalization 50%

Engineering

• Front End 100%
• Equalizers 100%
• Digital Converter 100%
• Energy Conservation 50%
• Time Domain 50%
• Delay Time 50%
• Amplifier 50%
• Eye Diagram 50%
• Electric Delay Lines 50%
• Signal Channel 50%
• Bathtub Curve 50%
• Receiver Area 50%
• Energy Efficiency 50%
• Bit Error Rate 50%