This paper reports a 128-channel neural recording integrated circuit (IC) with on-the-fly spike feature extraction and wireless telemetry. The chip consists of eight 16-channel front-end recording blocks, spike detection and feature extraction digital signal processor (DSP), ultra wideband (UWB) transmitter, and on-chip bias generators. Each recording channel has amplifiers with programmable gain and bandwidth to accommodate different types of biological signals. An analog-to-digital converter (ADC) shared by 16 amplifiers through time-multiplexing results in a balanced trade-off between the power consumption and chip area. A nonlinear energy operator (NEO) based spike detector is implemented for identifying spikes, which are further processed by a digital frequency-shaping filter. The computationally efficient spike detection and feature extraction algorithms attribute to an auspicious DSP implementation on-chip. UWB telemetry is designed to wirelessly transfer raw data from 128 recording channels at a data rate of 90 Mbit/s. The chip is realized in 0.35 μmu complementary metal-oxide-semiconductor (CMOS) process with an area of 8.8 × 7.2 mm2 and consumes 6 mW by employing a sequential turn-on architecture that selectively powers off idle analog circuit blocks. The chip has been tested for electrical specifications and verified in an ex vivo biological environment.
|Original language||English (US)|
|Number of pages||10|
|Journal||IEEE Transactions on Neural Systems and Rehabilitation Engineering|
|State||Published - Aug 2009|
Bibliographical noteFunding Information:
Manuscript received October 02, 2008; revised January 16, 2009; accepted March 10, 2009. First published May 08, 2009; current version published August 07, 2009. This work was supported in part by the Defense Advanced Research Projects Agency (DARPA), in part by UC-MICRO, and in part by National Semiconductor.
- Digital signal processing (DSP)
- Integrated circuit (IC)
- Low-noise amplifier
- Neural recording system
- Ultra-wideband (UWB)