A 104.8TOPS/W One-Shot Time-Based Neuromorphic Chip Employing Dynamic Threshold Error Correction in 65nm

Luke R. Everson, Muqing Liu, Nakul Pande, Chris H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

As neural networks continue to infiltrate diverse application domains, computing will begin to move out of the cloud and onto edge devices necessitating fast, reliable, and low power solutions. To meet these requirements, we propose a time-domain core using one-shot delay measurements and a lightweight post-processing technique, Dynamic Threshold Error Correction (DTEC). This design differs from traditional digital implementations in that it uses the delay accumulated through a simple inverter chain distributed through an SRAM array to intrinsically compute resource intensive multiply-accumulate (MAC) operations. Implemented in 65nmLP CMOS we achieve, to our knowledge, the lowest reported energy efficiency for a neuromorphic processor with 52.4TSOp/s/W (104.8TOp/S/W) at 0.7V with 3b resolution for an impressive 19.1fJ/MAC.

Original languageEnglish (US)
Title of host publication2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages273-276
Number of pages4
ISBN (Electronic)9781538664124
DOIs
StatePublished - Dec 14 2018
Event2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Tainan, Taiwan, Province of China
Duration: Nov 5 2018Nov 7 2018

Publication series

Name2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings

Other

Other2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018
CountryTaiwan, Province of China
CityTainan
Period11/5/1811/7/18

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    Everson, L. R., Liu, M., Pande, N., & Kim, C. H. (2018). A 104.8TOPS/W One-Shot Time-Based Neuromorphic Chip Employing Dynamic Threshold Error Correction in 65nm. In 2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings (pp. 273-276). [8579302] (2018 IEEE Asian Solid-State Circuits Conference, A-SSCC 2018 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASSCC.2018.8579302