A 0.4-1.0GHz, 47MHop/S Frequency Hopped TXR Front-End with 20dB in-Band Blocker Rejection

Naser Mousavi, Zhiheng Wang, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

An ultra-fast frequency hopping spread spectrum transceiver front-end architecture is presented that provides 20dB of processing gain at RF for the first time. This enables the receiver front-end to supress any in-band interferes by 20dB before they arrive at the LNA. The circuit consists of passive mixers and agile digital oscillator/DAC engines that are capable of quickly moving in the frequency domain with very low power. A transient hop time of 1.5ns is achieved in this design. The front-end implemented in 65nm CMOS technology, occupies an active area of 3.lmm2, and consumes 24mW (=PTX=PRX) from a 1V power supply for a center frequency of 1GHz.

Original languageEnglish (US)
Title of host publicationESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages246-249
Number of pages4
ISBN (Electronic)9781538654040
DOIs
StatePublished - Oct 16 2018
Event44th IEEE European Solid State Circuits Conference, ESSCIRC 2018 - Dresden, Germany
Duration: Sep 3 2018Sep 6 2018

Publication series

NameESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference

Other

Other44th IEEE European Solid State Circuits Conference, ESSCIRC 2018
CountryGermany
CityDresden
Period9/3/189/6/18

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    Mousavi, N., Wang, Z., & Harjani, R. (2018). A 0.4-1.0GHz, 47MHop/S Frequency Hopped TXR Front-End with 20dB in-Band Blocker Rejection. In ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (pp. 246-249). [8494249] (ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ESSCIRC.2018.8494249