4 × 12 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Receiver in 65 nm CMOS Process

Taehyoun Oh; Ramesh Harjani

doi:10.1007/978-1-4614-4963-8_3

4 × 12 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Receiver in 65 nm CMOS Process

Taehyoun Oh, Ramesh Harjani

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Chapter

Abstract

The demand for higher throughput combined with the finite number of I/Os has increased the need for higher data rates per pin [1-6]. Unfortunately, this usually results in increased inter-symbol interference and crosstalk noise, demanding larger power consumption for signal amplification and equalization. Conventionally, crosstalk has been handled by board-level techniques i.e. maintaining sufficient distance between channels or shielding signal channels. Choosing differential I/Os instead of single-ended can reduce crosstalk but at the cost of doubling the number of I/O pads and increases power consumption.

Original language	English (US)
Title of host publication	Analog Circuits and Signal Processing
Publisher	Springer
Pages	27-46
Number of pages	20
DOIs	https://doi.org/10.1007/978-1-4614-4963-8_3
State	Published - 2014

Publication series

Name	Analog Circuits and Signal Processing
ISSN (Print)	1872-082X
ISSN (Electronic)	2197-1854

Bibliographical note

Publisher Copyright:
© 2014, Springer Science+Business Media New York.

Keywords

Arbitrary Waveform Generator
Channel Spacing
Crosstalk Noise
Crosstalk Signal
Forward Signal

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10.1007/978-1-4614-4963-8_3

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AU - Harjani, Ramesh

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N2 - The demand for higher throughput combined with the finite number of I/Os has increased the need for higher data rates per pin [1-6]. Unfortunately, this usually results in increased inter-symbol interference and crosstalk noise, demanding larger power consumption for signal amplification and equalization. Conventionally, crosstalk has been handled by board-level techniques i.e. maintaining sufficient distance between channels or shielding signal channels. Choosing differential I/Os instead of single-ended can reduce crosstalk but at the cost of doubling the number of I/O pads and increases power consumption.

AB - The demand for higher throughput combined with the finite number of I/Os has increased the need for higher data rates per pin [1-6]. Unfortunately, this usually results in increased inter-symbol interference and crosstalk noise, demanding larger power consumption for signal amplification and equalization. Conventionally, crosstalk has been handled by board-level techniques i.e. maintaining sufficient distance between channels or shielding signal channels. Choosing differential I/Os instead of single-ended can reduce crosstalk but at the cost of doubling the number of I/O pads and increases power consumption.

KW - Arbitrary Waveform Generator

KW - Channel Spacing

KW - Crosstalk Noise

KW - Crosstalk Signal

KW - Forward Signal

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M3 - Chapter

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T3 - Analog Circuits and Signal Processing

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BT - Analog Circuits and Signal Processing

PB - Springer

ER -

4 × 12 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Receiver in 65 nm CMOS Process

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