We describe a 200MHz sample rate analog finite impulse response (FIR) filter suitable for readback equalization in a disk drive channel. The BiCMOS FIR has seven taps all programmable to six bit weights and is implemented in fully differential form. Eight bit linearity is maintained in each circuit block so that the total FIR linearity is well above the six bits required for disk drive electronics. The FIR uses a new track and hold architecture which reduces power consumption over previous architectures while providing high speed operation. Total power consumed is 150mW for a 5 volt supply.
|Original language||English (US)|
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - Jan 1 1996|
|Event||Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA|
Duration: May 12 1996 → May 15 1996