Abstract
The recent breakthroughs of deep neural networks (DNNs) and the advent of billions of Internet of Things (IoT) devices have excited an explosive demand for intelligent IoT devices equipped with domainspecific DNN accelerators. However, the deployment of DNN accelerator enabled intelligent functionality into real-world IoT devices still remains particularly challenging. First, powerful DNNs often come at prohibitive complexities, whereas IoT devices often suffer from stringent resource constraints. Second, while DNNs are vulnerable to adversarial attacks especially on IoT devices exposed to complex real-world environments, many IoT applications require strict security. Existing DNN accelerators mostly tackle only one of the two aforementioned challenges (i.e., efficiency or adversarial robustness) while neglecting or even sacrificing the other. To this end, we propose a 2-in-1 Accelerator, an integrated algorithm-accelerator co-design framework aiming at winning both the adversarial robustness and efficiency of DNN accelerators. Specifically, we first propose a Random Precision Switch (RPS) algorithm that can effectively defend DNNs against adversarial attacks by enabling random DNN quantization as an in-situ model switch during training and inference. Furthermore, we propose a new precision-scalable accelerator featuring (1) a new precision-scalable MAC unit architecture which spatially tiles the temporal MAC units to boost both the achievable efficiency and flexibility and (2) a systematically optimized dataflow that is searched by our generic accelerator optimizer. Extensive experiments and ablation studies validate that our 2-in-1 Accelerator can not only aggressively boost both the adversarial robustness and efficiency of DNN accelerators under various attacks, but also naturally support instantaneous robustness-efficiency trade-offs adapting to varied resources without the necessity of DNN retraining. We believe our 2-in-1 Accelerator has opened up an exciting perspective for robust and efficient accelerator design.
Original language | English (US) |
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Title of host publication | MICRO 2021 - 54th Annual IEEE/ACM International Symposium on Microarchitecture, Proceedings |
Publisher | IEEE Computer Society |
Pages | 225-237 |
Number of pages | 13 |
ISBN (Electronic) | 9781450385572 |
DOIs | |
State | Published - Oct 18 2021 |
Externally published | Yes |
Event | 54th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2021 - Virtual, Online, Greece Duration: Oct 18 2021 → Oct 22 2021 |
Publication series
Name | Proceedings of the Annual International Symposium on Microarchitecture, MICRO |
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ISSN (Print) | 1072-4451 |
Conference
Conference | 54th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2021 |
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Country/Territory | Greece |
City | Virtual, Online |
Period | 10/18/21 → 10/22/21 |
Bibliographical note
Publisher Copyright:© 2021 Association for Computing Machinery.
Keywords
- Model robustness
- Neural networks
- Precision-scalable accelerators