Automated Layout Of Analog Arrays In Advanced Technology Nodes

Sapatnekar, Sachin S (PI)
Harjani, Ramesh (CoI)

Electrical and Computer Engineering

Project: Research project

Description

Automated Layout Of Analog Arrays In Advanced Technology Nodes

Status	Active
Effective start/end date	1/1/22 → 12/31/24

Funding

University of Texas at Dallas