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Automated Layout Of Analog Arrays In Advanced Technology Nodes
Sapatnekar, Sachin S
(PI)
Harjani, Ramesh
(CoI)
Electrical and Computer Engineering
Project
:
Research project
Overview
Project Details
Description
Automated Layout Of Analog Arrays In Advanced Technology Nodes
Status
Active
Effective start/end date
1/1/22
→
12/31/24
Funding
University of Texas at Dallas
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