Projects per year
Personal profile
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Fingerprint
The Fingerprint is created by mining the titles and abstracts of the person's research outputs and projects/funding awards to create an index of weighted terms from discipline-specific thesauri.
- 1 Similar Profiles
Collaborations and top research areas from the last five years
Recent external collaboration on country/territory level. Dive into details by clicking on the dots or
Projects
- 2 Active
-
Spiking Vision Transformers on Neuromorphic Hardware
SANDIA NATIONAL LABORATORIES, U.S. DEPARTMENT OF ENERGY (USDOE)
11/6/23 → 9/30/24
Project: Research project
-
Advanced Technology Boosters to Enable Low Temperature Logic Technology (LTLT) on a CMOS Platform
UNIVERSITY OF NOTRE DAME, USDOD DEFENSE ADV RES PROJECTS
10/24/23 → 10/23/24
Project: Research project
-
Algorithm-hardware Co-optimization for Energy-efficient Drone Detection on Resource-constrained FPGA
Suh, H. S., Meng, J., Nguyen, T., Kumar, V., Cao, Y. & Seo, J. S., May 10 2023, In: ACM Transactions on Reconfigurable Technology and Systems. 16, 2, 3583074.Research output: Contribution to journal › Article › peer-review
-
Digital-Assisted Analog In-Memory Computing with RRAM Devices
Wang, Z., Nalla, P. S., Krishnan, G., Joshi, R. V., Cady, N. C., Fan, D., Seo, J. S. & Cao, Y., 2023, 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
-
FPGA Acceleration of GCN in Light of the Symmetry of Graph Adjacency Matrix
Nair, G. R., Suh, H. S., Halappanavar, M., Liu, F., Seo, J. S. & Cao, Y., 2023, 2023 Design, Automation and Test in Europe Conference and Exhibition, DATE 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
-
Graph-based Compact Modeling (GCM) of CMOS transistors for efficient parameter extraction: A machine learning approach
Gaidhane, A. D., Yang, Z. & Cao, Y., Mar 2023, In: Solid-State Electronics. 201, 108580.Research output: Contribution to journal › Article › peer-review
-
MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures
Zhu, Z., Sun, H., Xie, T., Zhu, Y., Dai, G., Xia, L., Niu, D., Chen, X., Hu, X. S., Cao, Y., Xie, Y., Yang, H. & Wang, Y., Nov 1 2023, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 42, 11, p. 4112-4125 14 p.Research output: Contribution to journal › Article › peer-review
Open Access