1990 …2022

Research output per year

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Research Output

2020

Adaptive-Length Coding of Image Data for Low-Cost Approximate Storage

Fan, Q., Lilja, D. J. & Sapatnekar, S. S., Feb 1 2020, In : IEEE Transactions on Computers. 69, 2, p. 239-252 14 p., 8865439.

Research output: Contribution to journalArticle

A DNA Read Alignment Accelerator based on Computational RAM

Chowdhury, Z. I., Zabihi, M., Khatamifard, S. K., Zhao, Z., Resch, S., Razaviyayn, M., Wang, J. P., Sapatnekar, S. S. & Karpuzcu, U. R., Jan 1 2020, (Accepted/In press) In : IEEE Journal on Exploratory Solid-State Computational Devices and Circuits.

Research output: Contribution to journalArticle

Open Access

Learning from experience: Applying ML to analog circuit design

Kunal, K., Dhar, T., Li, Y., Madhusudan, M., Poojary, J., Sharma, A. K., Xu, W., Burns, S. M., Harjani, R., Hu, J., Mukherjee, P. & Sapatnekar, S. S., Sep 20 2020, ISPD 2020 - Proceedings of the 2020 International Symposium on Physical Design. Association for Computing Machinery, 1 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access

Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques

Chhabria, V. A., Kahng, A. B., Kim, M., Mallappa, U., Sapatnekar, S. S. & Xu, B., Jan 2020, ASP-DAC 2020 - 25th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 44-49 6 p. 9045303. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; vol. 2020-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2019

2.5 A 40×40 Four-Neighbor Time-Based In-Memory Computing Graph ASIC Chip Featuring Wavefront Expansion and 2D Gradient Control

Everson, L. R., Sapatnekar, S. S. & Kim, C. H., Mar 6 2019, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 50-52 3 p. 8662455. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; vol. 2019-February).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

An analytical approach for error PMF characterization in approximate circuits

Sengupta, D., Snigdha, F. S., Hu, J. & Sapatnekar, S. S., Jan 2019, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38, 1, p. 70-83 14 p., 8283743.

Research output: Contribution to journalArticle

1 Scopus citations

An Energy Efficient Non-Volatile Flip-Flop based on CoMET Technology

Perricone, R., Liang, Z., Mankalale, M. G., Niemier, M., Sapatnekar, S. S., Wang, J. P. & Hu, X. S., May 14 2019, Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019. Institute of Electrical and Electronics Engineers Inc., p. 390-395 6 p. 8714916. (Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dynamic Approximation of JPEG Hardware

Snigdha, F. S., Sengupta, D., Hu, J. & Sapatnekar, S. S., Feb 2019, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38, 2, p. 295-308 14 p., 8299430.

Research output: Contribution to journalArticle

1 Scopus citations

Electromigration-aware interconnect design

Sapatnekar, S. S., Apr 4 2019, ISPD 2019 - Proceedings of the 2019 International Symposium on Physical Design. Association for Computing Machinery, p. 83-90 8 p. (Proceedings of the International Symposium on Physical Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fast Mapping-Based High-Level Synthesis of Pipelined Circuits

Li, C., Sapatnekar, S. S. & Hu, J., Apr 23 2019, Proceedings of the 20th International Symposium on Quality Electronic Design, ISQED 2019. IEEE Computer Society, p. 33-38 6 p. 8697596. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2019-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Impact of Self-heating on Performance and Reliability in FinFET and GAAFET Designs

Chhabria, V. A. & Sapatnekar, S. S., Apr 23 2019, Proceedings of the 20th International Symposium on Quality Electronic Design, ISQED 2019. IEEE Computer Society, p. 235-240 6 p. 8697786. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2019-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Improving QoS for global dual-criticality scheduling on multiprocessors

Huang, L., Hou, I. H., Sapatnekar, S. S. & Hu, J., Aug 2019, Proceedings - 2019 IEEE 25th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2019. Institute of Electrical and Electronics Engineers Inc., 8864597. (Proceedings - 2019 IEEE 25th International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

In-memory processing on the spintronic cram: From hardware design to application mapping

Zabihi, M., Chowdhury, Z. I., Zhao, Z., Karpuzcu, U. R., Wang, J. P. & Sapatnekar, S. S., Aug 1 2019, In : IEEE Transactions on Computers. 68, 8, p. 1159-1173 15 p., 8416761.

Research output: Contribution to journalArticle

5 Scopus citations

INVITED: Toward an open-source digital flow: First learnings from the OpenROAD project

Ajayi, T., Chhabria, V. A., Fogaça, M., Hashemi, S., Hosny, A., Kahng, A. B., Kim, M., Lee, J., Mallappa, U., Neseem, M., Pradipta, G., Reda, S., Saligane, M., Sapatnekar, S. S., Sechen, C., Shalan, M., Swartz, W., Wang, L., Wang, Z., Woo, M. & 1 others, Xu, B., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a76. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

INVITED: ALIGN - Open-source analog layout automation from the ground up

Kunal, K., Madhusudan, M., Sharma, A. K., Xu, W., Burns, S. M., Harjani, R., Hu, J., Kirkpatrick, D. A. & Sapatnekar, S. S., Jun 2 2019, Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., a77. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

PIMBALL: Binary neural networks in spintronic memory

Resch, S., Khatamifard, S. K., Chowdhury, Z. I., Zabihi, M., Zhao, Z., Wang, J. P., Sapatnekar, S. S. & Karpuzcu, U. R., Oct 2019, In : ACM Transactions on Architecture and Code Optimization. 16, 4, A41.

Research output: Contribution to journalArticle

Open Access

Reliability Analysis of a Delay-Locked Loop under HCI and BTI Degradation

Dhar, T. & Sapatnekar, S. S., May 22 2019, 2019 IEEE International Reliability Physics Symposium, IRPS 2019. Institute of Electrical and Electronics Engineers Inc., 8720447. (IEEE International Reliability Physics Symposium Proceedings; vol. 2019-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

SEFACT: Selective feature activation and early classification for CNNs

Snigdha, F. S., Ahmed, I., Manasi, S. D., Mankalale, M. G., Hu, J. & Sapatnekar, S. S., Jan 21 2019, ASP-DAC 2019 - 24th Asia and South Pacific Design Automation Conference. Institute of Electrical and Electronics Engineers Inc., p. 526-531 6 p. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

SkyLogic - A Proposal for a Skyrmion-Based Logic Device

Mankalale, M. G., Zhao, Z., Wang, J. P. & Sapatnekar, S. S., Apr 2019, In : IEEE Transactions on Electron Devices. 66, 4, p. 1990-1996 7 p., 8660572.

Research output: Contribution to journalArticle

2 Scopus citations

Spintronic In-Memory Pattern Matching

Chowdhury, Z. I., Karen Khatamifard, S., Zhao, Z., Zabihi, M., Resch, S., Razaviyayn, M., Wang, J. P., Sapatnekar, S. & Karpuzcu, U. R., Dec 2019, In : IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 5, 2, p. 206-214 9 p., 8890687.

Research output: Contribution to journalArticle

Open Access

Stress-induced performance shifts in 3d drams

Li, T. & Sapatnekar, S. S., Oct 2019, In : ACM Transactions on Design Automation of Electronic Systems. 24, 5, 57.

Research output: Contribution to journalArticle

True in-memory computing with the CRAM: From technology to applications

Zabihi, M., Zhao, Z., Chowdhury, Z. I., Resch, S., Dc, M., Peterson, T., Karpuzcu, U. R., Wang, J. P. & Sapatnekar, S. S., May 13 2019, GLSVLSI 2019 - Proceedings of the 2019 Great Lakes Symposium on VLSI. Association for Computing Machinery, 1 p. 3319451. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Using DCT-based Approximate Communication to Improve MPI Performance in Parallel Clusters

Fan, Q., Lilja, D. J. & Sapatnekar, S. S., Oct 2019, 2019 IEEE 38th International Performance Computing and Communications Conference, IPCCC 2019. Institute of Electrical and Electronics Engineers Inc., 8958720. (2019 IEEE 38th International Performance Computing and Communications Conference, IPCCC 2019).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Using Spin-Hall MTJs to Build an Energy-Efficient In-memory Computation Platform

Zabihi, M., Zhao, Z., Mahendra, D. C., Chowdhury, Z. I., Resch, S., Peterson, T., Karpuzcu, U. R., Wang, J. P. & Sapatnekar, S. S., Apr 23 2019, Proceedings of the 20th International Symposium on Quality Electronic Design, ISQED 2019. IEEE Computer Society, p. 52-57 6 p. 8697377. (Proceedings - International Symposium on Quality Electronic Design, ISQED; vol. 2019-March).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations
2018

A simple yet efficient accuracy-configurable adder design

Xu, W., Sapatnekar, S. S. & Hu, J., Jun 2018, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 6, p. 1112-1125 14 p.

Research output: Contribution to journalArticle

8 Scopus citations

Circuit Performance Shifts Due to Layout-Dependent Stress in Planar and 3D-ICs

Marella, S. K. & Sapatnekar, S. S., Dec 2018, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26, 12, p. 2907-2920 14 p., 8463602.

Research output: Contribution to journalArticle

Computing-in-memory with spintronics

Jain, S., Sapatnekar, S. S., Wang, J. P., Roy, K. & Raghunathan, A., Apr 19 2018, Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., p. 1640-1645 6 p. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; vol. 2018-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Efficient In-Memory Processing Using Spintronics

Chowdhury, Z. I., Harms, J. D., Khatamifard, S. K., Zabihi, M., Lv, Y., Lyle, A. P., Sapatnekar, S. S., Karpuzcu, U. & Wang, J., Jan 1 2018, In : IEEE Computer Architecture Letters. 17, 1, p. 42-46 5 p.

Research output: Contribution to journalArticle

Open Access
13 Scopus citations
Open Access

Graceful degradation of low-criticality tasks in multiprocessor dual-criticality systems

Huang, L., Hou, I. H., Sapatnekar, S. S. & Hu, J., Oct 10 2018, Proceedings of the 26th International Conference on Real-Time Networks and Systems, RTNS 2018. Association for Computing Machinery, p. 159-169 11 p. (ACM International Conference Proceeding Series).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Performance characterization and majority gate design for MESO-based circuits

Zhaoxin, L., Mankalale, M. G., Hu, J., Zhao, Z., Wang, J. P. & Sapatnekar, S. S., Jan 1 2018, In : IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 4, 2, p. 51-59 9 p., 8485738.

Research output: Contribution to journalArticle

Open Access
2 Scopus citations

Strain-aware performance evaluation and correction for OTFT-based flexible displays

Li, T. & Sapatnekar, S. S., Nov 5 2018, 2018 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2018 - Digest of Technical Papers. Institute of Electrical and Electronics Engineers Inc., a40. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Using imprecise computing for improved non-preemptive real-time scheduling

Huang, L., Li, Y., Sapatnekar, S. S. & Hu, J., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., a71. (Proceedings - Design Automation Conference; vol. Part F137710).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2017

3D placement and routing

Zhou, P. & Sapatnekar, S. S., Jan 1 2017, Physical Design for 3D Integrated Circuits. CRC Press, p. 83-100 18 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

Open Access
11 Scopus citations

Advanced spintronic memory and logic for non-volatile processors

Perricone, R., Ahmed, I., Liang, Z., Mankalale, M. G., Hu, X. S., Kim, C. H., Niemier, M., Sapatnekar, S. S. & Wang, J., May 11 2017, Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017. Institute of Electrical and Electronics Engineers Inc., p. 972-977 6 p. 7927132. (Proceedings of the 2017 Design, Automation and Test in Europe, DATE 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

15 Scopus citations

A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited

Wang, J. P., Sapatnekar, S. S., Kim, C. H., Crowell, P., Koester, S., Datta, S., Roy, K., Raghunathan, A., Hu, X. S., Niemier, M., Naeemi, A., Chien, C. L., Ross, C. & Kawakami, R., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., 16. (Proceedings - Design Automation Conference; vol. Part 128280).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
6 Scopus citations

A simple yet efficient accuracy configurable adder design

Xu, W., Sapatnekar, S. S. & Hu, J., Aug 11 2017, ISLPED 2017 - IEEE/ACM International Symposium on Low Power Electronics and Design. Institute of Electrical and Electronics Engineers Inc., 8009206. (Proceedings of the International Symposium on Low Power Electronics and Design).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

CoMET: Composite-Input Magnetoelectric-Based Logic Technology

Mankalale, M. G., Liang, Z., Zhao, Z., Kim, C. H., Wang, J. & Sapatnekar, S. S., Dec 2017, In : IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 3, p. 27-36 10 p., 7893717.

Research output: Contribution to journalArticle

Open Access
14 Scopus citations

Cost-quality trade-offs of approximate memory repair mechanisms for image data

Fan, Q., Sapatnekar, S. S. & Lilja, D. J., May 2 2017, Proceedings of the 18th International Symposium on Quality Electronic Design, ISQED 2017. IEEE Computer Society, p. 438-444 7 p. 7918355. (Proceedings - International Symposium on Quality Electronic Design, ISQED).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Estimating Circuit Aging Due to BTI and HCI Using Ring-Oscillator-Based Sensors

Sengupta, D. & Sapatnekar, S. S., Oct 2017, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 36, 10, p. 1688-1701 14 p., 7807330.

Research output: Contribution to journalArticle

Open Access
9 Scopus citations

Fast Stochastic Analysis of Electromigration in Power Distribution Networks

Jain, P., Mishra, V. & Sapatnekar, S. S., Sep 2017, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25, 9, p. 2512-2524 13 p., 7945294.

Research output: Contribution to journalArticle

1 Scopus citations

Incorporating the Role of Stress on Electromigration in Power Grids with Via Arrays

Mishra, V., Jain, P., Marella, S. K. & Sapatnekar, S. S., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., 21. (Proceedings - Design Automation Conference; vol. Part 128280).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations
Open Access
6 Scopus citations

SABER: Selection of Approximate Bits for the Design of Error Tolerant Circuits

Sengupta, D., Snigdha, F. S., Hu, J. & Sapatnekar, S. S., Jun 18 2017, Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017. Institute of Electrical and Electronics Engineers Inc., 72. (Proceedings - Design Automation Conference; vol. Part 128280).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Open Access
10 Scopus citations

Special session: A qantifiable approach to approximate computing

Li, C., Xu, W., Sengupta, D., Hu, J., Snigdha, F. S. & Sapatnekar, S. S., Oct 15 2017, Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017. Association for Computing Machinery, Inc, 3125511. (Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion, CASES 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Static timing analysis

Cortadella, J. & Sapatnekar, S. S., Jan 1 2017, Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology. CRC Press, p. 133-154 22 p.

Research output: Chapter in Book/Report/Conference proceedingChapter

STEM: A scheme for two-phase evaluation of majority logic

Mankalale, M. G., Liang, Z. & Sapatnekar, S. S., Jul 2017, In : IEEE Transactions on Nanotechnology. 16, 4, p. 606-615 10 p., 7904699.

Research output: Contribution to journalArticle

1 Scopus citations

Stress-aware performance evaluation of 3D-stacked wide I/O DRAMs

Li, T. & Sapatnekar, S. S., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., p. 645-650 6 p. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 2017-November).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2016
5 Scopus citations