Projects per year
Personal profile
Expertise related to UN SDGs
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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The Fingerprint is created by mining the titles and abstracts of the person's research outputs and projects/funding awards to create an index of weighted terms from discipline-specific thesauri.
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Recent external collaboration on country level. Dive into details by clicking on the dots.
Projects
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DESIGN AND MODELING OF MACHINE LEARNING HARDWARE FOR GRAPH PROCESSING
SEMICONDUCTOR RESEARCH CORPORATION
1/1/21 → 12/31/21
Project: Research project
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Analysis and Optimization of Rapid Thermal Annealing Effects in Integrated Circuits
12/31/20 → 12/30/21
Project: Research project
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VeriGOOD-ML: Verilog Generator (Open-source), Optimized for Designs for Machine Learning
USDOD DEFENSE ADV RES PROJECTS
12/30/19 → 6/29/21
Project: Research project
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ALIGN: Analog Layout, Intelligently Generated from Netlists
Sapatnekar, S. S. & Harjani, R.
8/13/18 → 8/12/21
Project: Research project
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OpenROAD: Foundations and Realization of Open, Accessibl
University of California San Diego
6/1/18 → 7/21/21
Project: Research project
Research output
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ALIGN: A System for Automating Analog Layout
Dhar, T., Kunal, K., Li, Y., Madhusudan, M., Poojary, J., Sharma, A. K., Xu, W., Burns, S. M., Harjani, R., Hu, J., Kirkpatrick, D. A., Mukherjee, P., Yaldiz, S. & Sapatnekar, S. S., Apr 2021, In: IEEE Design and Test. 38, 2, p. 8-18 11 p., 9279310.Research output: Contribution to journal › Article › peer-review
1 Scopus citations -
A Time-Based Intra-Memory Computing Graph Processor Featuring A* Wavefront Expansion and 2-D Gradient Control
Everson, L. R., Sapatnekar, S. S. & Kim, C. H., 2021, (Accepted/In press) In: IEEE Journal of Solid-State Circuits.Research output: Contribution to journal › Article › peer-review
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DeepOpt: Optimized Scheduling of CNNWorkloads for ASIC-based Systolic Deep Learning Accelerators
Manasi, S. D. & Sapatnekar, S. S., Jan 18 2021, Proceedings of the 26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021. Institute of Electrical and Electronics Engineers Inc., p. 235-241 7 p. 3431539. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open Access -
Thermal and IR Drop Analysis Using Convolutional Encoder-Decoder Networks
Chhabria, V. A., Ahuja, V., Prabhu, A., Patil, N., Jain, P. & Sapatnekar, S. S., Jan 18 2021, Proceedings of the 26th Asia and South Pacific Design Automation Conference, ASP-DAC 2021. Institute of Electrical and Electronics Engineers Inc., p. 690-696 7 p. 3431583. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open Access -
A Customized Graph Neural Network Model for Guiding Analog IC Placement
Li, Y., Lin, Y., Madhusudan, M., Sharma, A., Xu, W., Sapatnekar, S. S., Harjani, R. & Hu, J., Nov 2 2020, In: IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD. 2020-November, 9256781.Research output: Contribution to journal › Conference article › peer-review
Open Access1 Scopus citations
Datasets
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Filtered Audio Clips from Approximate FIR Filters Designed Using the SABER Algorithm
Hu, J., Sapatnekar, S. S., Sengupta, D. & Sharmin Snigdha, F., Data Repository for the University of Minnesota, 2017
DOI: 10.13020/D6BP4X, https://doi.org/10.13020/D6BP4X
Dataset