Projects per year
Personal profile
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
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Collaborations and top research areas from the last five years
Projects
- 23 Finished
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Scalable Ultra-Low Variation Analog-Time Neural Network (S-UATN) Accelerator
Harjani, R. (PI)
NORTHWESTERN UNIVERSITY, USDOD DEFENSE ADV RES PROJECTS
6/9/25 → 10/17/25
Project: Research project
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Passive Tile Architecture for MAX
Harjani, R. (PI) & Parhi, K. K. (CoI)
BAE SYSTEMS LAND & ARMAMENTS HOLDINGS, USDOD DEFENSE ADV RES PROJECTS
4/24/23 → 8/21/24
Project: Research project
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ALIGN Analog Layout Design Suite
Harjani, R. (PI)
THE NATIONAL SCIENCE FOUNDATION
3/1/23 → 2/29/24
Project: Research project
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Automated Layout Of Analog Arrays In Advanced Technology Nodes
Sapatnekar, S. S. (PI) & Harjani, R. (CoI)
UNIVERSITY OF TEXAS AT DALLAS, SEMICONDUCTOR RESEARCH CORPORATION
1/1/22 → 12/31/24
Project: Research project
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ALIGN: Analog Layout, Intelligently Generated from Netlists
Sapatnekar, S. S. (PI) & Harjani, R. (CoI)
8/13/18 → 2/12/23
Project: Research project
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Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables
Ghosh, S., Gebru, E. Y., Kashyap, C. V., Harjani, R. & Sapatnekar, S. S., 2025, 2025 Design, Automation and Test in Europe Conference, DATE 2025 - Proceedings. Institute of Electrical and Electronics Engineers Inc., (Proceedings -Design, Automation and Test in Europe, DATE).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Scopus citations -
Analyzing the Impact of FinFET Self-Heating on the Performance of RF Power Amplifiers
Karmokar, N., Tam, S. W., Dinh, T. V., Chhabria, V. A., Harjani, R. & Sapatnekar, S. S., Apr 9 2025, Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2024. Institute of Electrical and Electronics Engineers Inc., 165. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Open Access -
Invited: EDA for Heterogeneous Integration
Haque, E., Nalla, P., Sudarshan, C. C., Yogi, D., Zhang, H., Chakrabarti, C., Chhabria, V. A., Harjani, R., Zhang, J. & Sapatnekar, S. S., 2025, 2025 62nd ACM/IEEE Design Automation Conference, DAC 2025. Institute of Electrical and Electronics Engineers Inc., (Proceedings - Design Automation Conference).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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Minimum Unit Capacitance Calculation for Capacitor Arrays in Binary-Weighted and Split DACs
Karmokar, N., Harjani, R. & Sapatnekar, S. S., 2025, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 44, 4, p. 1210-1223 14 p.Research output: Contribution to journal › Article › peer-review
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A 3.5 to 4.7-GHz Fractional-N ADPLL With a Low-Power Time-Interleaved GRO-TDC of 6.2-ps Resolution in 65-nm CMOS Process
Cho, K. U., Gil, J., Park, C., Cho, K. J., Shin, J. W., Kim, E. S., Eo, Y. S., Harjani, R., Kim, N. Y. & Oh, T., 2024, In: IEEE Access. 12, p. 142677-142694 18 p.Research output: Contribution to journal › Article › peer-review
Open Access2 Scopus citations