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Research Output 1986 2019

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Conference article
2011
1 Citation (Scopus)

Frequency domain symbol synchronization for OFDM systems

Kung, T. L. & Parhi, K. K., Nov 7 2011, In : IEEE International Conference on Electro Information Technology. 5978592.

Research output: Contribution to journalConference article

Orthogonal frequency division multiplexing
Synchronization
Transmitters
Electric power utilization
Frequency selective fading
6 Citations (Scopus)

Reconfigurable architectures for silicon Physical Unclonable Functions

Lao, Y. & Parhi, K. K., Nov 7 2011, In : IEEE International Conference on Electro Information Technology. 5978614.

Research output: Contribution to journalConference article

Reconfigurable architectures
Silicon
Networks (circuits)
Authentication
Field programmable gate arrays (FPGA)
2005
4 Citations (Scopus)

Pipelining Tomlinson-Harashima precoders

Gu, Y. & Parhi, K. K., Dec 1 2005, In : Proceedings - IEEE International Symposium on Circuits and Systems. p. 408-411 4 p., 1464611.

Research output: Contribution to journalConference article

Decision feedback equalizers
IIR filters
Pipelines
Nonlinear feedback
10 Citations (Scopus)

Quasi-cyclic low-density parity-check coded multiband-OFDM UWB systems

Kim, S. M., Tang, J. & Parhi, K. K., Dec 1 2005, In : Proceedings - IEEE International Symposium on Circuits and Systems. p. 65-68 4 p., 1464525.

Research output: Contribution to journalConference article

Ultra-wideband (UWB)
Orthogonal frequency division multiplexing
Convolutional codes
Communication
2004
6 Citations (Scopus)

An efficient 21.56GBPS AES implementation on FPGA

Zhang, X. & Parhi, K. K., Dec 1 2004, In : Conference Record - Asilomar Conference on Signals, Systems and Computers. 1, p. 465-470 6 p.

Research output: Contribution to journalConference article

Cryptography
Field programmable gate arrays (FPGA)
Computer hardware
Throughput
Composite materials
22 Citations (Scopus)
Decoding
Hardware
Degradation
2 Citations (Scopus)

Efficient high-speed quasi-cyclic LDPC decoder architecture

Zhang, Y., Wang, Z. & Parhi, K. K., Dec 1 2004, In : Conference Record - Asilomar Conference on Signals, Systems and Computers. 1, p. 540-544 5 p.

Research output: Contribution to journalConference article

Adders
Decoding
Hardware
4 Citations (Scopus)

Fast factorization architecture in soft-decision reed-solomon decoding

Zhang, X. & Parhi, K. K., Dec 1 2004, In : IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. p. 101-106 6 p.

Research output: Contribution to journalConference article

Factorization
Reed-Solomon codes
Decoding
Communication systems
Computer systems
10 Citations (Scopus)

Implementation of scalable elliptic curve cryptosystem crypto-accelerators for GF(2 m)

Cohen, A. E. & Parhi, K. K., Dec 1 2004, In : Conference Record - Asilomar Conference on Signals, Systems and Computers. 1, p. 471-477 7 p.

Research output: Contribution to journalConference article

Cryptography
Particle accelerators
Polynomials
11 Citations (Scopus)

Overlapped decoding for a class of quasi-cyclic LDPC codes

Kim, S. M. & Parhi, K. K., Dec 1 2004, In : IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. p. 113-117 5 p.

Research output: Contribution to journalConference article

Decoding
Clocks
Processing
6 Citations (Scopus)

Pulsed OFDM modulation for ultra wideband communications

Saberinia, E., Tang, J., Tewfik, A. H. & Parhi, K. K., Sep 6 2004, In : Proceedings - IEEE International Symposium on Circuits and Systems. 5

Research output: Contribution to journalConference article

Ultra-wideband (UWB)
Orthogonal frequency division multiplexing
Modulation
Communication
Electric power utilization
2003
2 Citations (Scopus)
Memory architecture
Decoding
Data storage equipment
Throughput
Code division multiple access
4 Citations (Scopus)

High throughput overlapped message passing for low density parity check codes

Chen, Y. & Parhi, K. K., Jul 28 2003, In : Proceedings of the IEEE Great Lakes Symposium on VLSI. p. 245-248 4 p.

Research output: Contribution to journalConference article

Message passing
Decoding
Throughput
Data storage equipment
Block codes
2002
2 Citations (Scopus)
Block codes
Decoding
Maximum likelihood
Modulation
Hardware
1 Citation (Scopus)
Turbo codes
Antennas
Bit error rate
Space-time block coding (STBC)
Block codes
2001
15 Citations (Scopus)
Hardware
2 Citations (Scopus)
Trellis codes
Decoding
Electric power utilization
Iterative decoding
Turbo codes
15 Citations (Scopus)
Parallel architectures
Hardware
7 Citations (Scopus)

On finite precision implementation of low density parity check codes decoder

Zhang, T., Wang, Z. & Parhi, K. K., Jan 1 2001, In : Materials Research Society Symposium - Proceedings. 626

Research output: Contribution to journalConference article

decoders
parity
decoding
tradeoffs
Decoding
2000
6 Citations (Scopus)

Efficient approaches to improving performance of VLSI SOVA-based Turbo decoders

Wang, Z., Suzuki, H. & Parhi, K. K., Jan 1 2000, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1

Research output: Contribution to journalConference article

Viterbi algorithm
Median filters
Bit error rate
Signal to noise ratio
Hardware
4 Citations (Scopus)

Iterative decoding of space-time trellis codes and related implementation issues

Chi, Z., Wang, Z. & Parhi, K. K., Dec 1 2000, In : Conference Record of the Asilomar Conference on Signals, Systems and Computers. 1, p. 562-566 5 p.

Research output: Contribution to journalConference article

Trellis codes
Iterative decoding
Fading channels
Convolutional codes
Channel capacity
7 Citations (Scopus)

K=3, 2Mbs low power turbo decoder for 3rd generation W-CDMA systems

Suzuki, H., Wang, Z. & Parhi, K. K., Jan 1 2000, In : Proceedings of the Custom Integrated Circuits Conference. p. 39-42 4 p.

Research output: Contribution to journalConference article

Code division multiple access
Transistors
Degradation
5 Citations (Scopus)

Systematic design approach of Mastrovito multipliers over GF(2m)

Zhang, T. & Parhi, K. K., Dec 1 2000, In : IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. p. 507-516 10 p.

Research output: Contribution to journalConference article

Polynomials
Hardware
1999
69 Citations (Scopus)

VLSI implementation issues of TURBO decoder design for wireless applications

Wang, Z., Suzuki, H. & Parhi, K. K., Dec 1 1999, In : IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. p. 503-512 10 p.

Research output: Contribution to journalConference article

Hardware
Degradation
Costs
1998
4 Citations (Scopus)

Efficient implementations of pipelined CORDIC based IIR digital filters using fast orthonormal μ-rotations

Ma, J., Parhi, K. K., Hekstra, G. J. & Deprettere, E. F., Dec 1 1998, In : Proceedings of SPIE - The International Society for Optical Engineering. 3461, p. 406-416 11 p.

Research output: Contribution to journalConference article

IIR filters
digital filters
Digital Filter
Givens Rotations
Orthonormal
4 Citations (Scopus)

Efficient parallel FIR filter implementations using frequency spectrum characteristics

Chung, J. G., Kim, Y. B., Jeong, H. G., Parhi, K. K. & Wang, Z., Jan 1 1998, In : Proceedings - IEEE International Symposium on Circuits and Systems. 5

Research output: Contribution to journalConference article

FIR filters
Hardware
Adders
Digital filters
Costs
2 Citations (Scopus)

Power comparison of SRT and GST dividers

Kuhlmann, M. & Parhi, K. K., Dec 1 1998, In : Proceedings of SPIE - The International Society for Optical Engineering. 3461, p. 584-594 11 p.

Research output: Contribution to journalConference article

Power Comparison
dividers
digits
Digit
Recurrence
16 Citations (Scopus)

Systolic VLSI architectures for 1-D discrete wavelet transforms

Denk, T. C. & Parhi, K. K., Dec 1 1998, In : Conference Record of the Asilomar Conference on Signals, Systems and Computers. 2, p. 1220-1223 4 p.

Research output: Contribution to journalConference article

Discrete wavelet transforms
Hardware