1986 …2021

Research output per year

If you made any changes in Pure these will be visible here soon.

Research Output

Filter
Article
1987

BLOCK DIGITAL FILTERING VIA INCREMENTAL BLOCK-STATE STRUCTURE.

Parhi, K. K. & Messerschmitt, D. G., Jan 1 1987, In : Proceedings - IEEE International Symposium on Circuits and Systems. p. 645-648 4 p.

Research output: Contribution to journalArticle

15 Scopus citations

Concurrent Cellular VLSI Adaptive Filter Architectures

Parhi, K. K. & Messerschmitt, D. G., Oct 1987, In : IEEE transactions on circuits and systems. 34, 10, p. 1141-1151 11 p.

Research output: Contribution to journalArticle

47 Scopus citations

On Optimizing Importance Sampling Simulations

Parhi, K. K. & Berkowitz, R. S., Dec 1987, In : IEEE transactions on circuits and systems. 34, 12, p. 1558-1563 6 p.

Research output: Contribution to journalArticle

2 Scopus citations
1989

Algorithm Transformation Techniques for Concurrent Processors

Parhi, K. K., Dec 1989, In : Proceedings of the IEEE. 77, 12, p. 1879-1895 17 p.

Research output: Contribution to journalArticle

116 Scopus citations

Concurrent Architectures for Two-Dimensional Recursive Digital Filtering

Parhi, K. K. & Messerschmitt, D. G., Jun 1989, In : IEEE transactions on circuits and systems. 36, 6, p. 813-829 17 p.

Research output: Contribution to journalArticle

28 Scopus citations

Fully-static rate-optimal scheduling of iterative data-flow programs via optimum unfolding

Parhi, K. K. & Messerschmitt, D. G., Dec 1 1989, In : Proceedings of the International Conference on Parallel Processing. 1, p. 209-216 8 p.

Research output: Contribution to journalArticle

10 Scopus citations
218 Scopus citations
79 Scopus citations
1991

A systematic approach for design of digit-serial signal processing architectures

Parhi, K. K., Apr 1 1991, In : IEEE transactions on circuits and systems. 38, 4, p. 358-375 18 p.

Research output: Contribution to journalArticle

112 Scopus citations

Finite Word Effects in Pipelined Recursive Filters

Parhi, K. K., Jun 1991, In : IEEE Transactions on Signal Processing. 39, 6, p. 1450-1454 5 p.

Research output: Contribution to journalArticle

13 Scopus citations

Pipelining in Algorithms with Quantizer Loops

Parhi, K. K., Jul 1991, In : IEEE transactions on circuits and systems. 38, 7, p. 745-754 10 p.

Research output: Contribution to journalArticle

54 Scopus citations

Pipelining in Dynamic Programming Architectures

Parhi, K. K., Jun 1991, In : IEEE Transactions on Signal Processing. 39, 6, p. 1442-1450 9 p.

Research output: Contribution to journalArticle

15 Scopus citations

Static Rate-Optimal Scheduling of Iterative Data-Flow Programs via Optimum Unfolding

Parhi, K. K. & Messerschmitt, D. G., Feb 1991, In : IEEE Transactions on Computers. 40, 2, p. 178-195 18 p.

Research output: Contribution to journalArticle

194 Scopus citations
1992

A Fast VLSI Adder Architecture

Srinivas, H. R. & Parhi, K. K., May 1992, In : IEEE Journal of Solid-State Circuits. 27, 5, p. 761-767 7 p.

Research output: Contribution to journalArticle

41 Scopus citations

An 85-MHz Fourth-Order Programmable IIR Digital Filter Chip

Hatamian, M. & Parhi, K. K., Feb 1992, In : IEEE Journal of Solid-State Circuits. 27, 2, p. 175-183 9 p.

Research output: Contribution to journalArticle

17 Scopus citations

Concurrent architectures for two-dimensional recursive digital filtering

Parhi, K. K. & Messerschmitt, D. G., Jan 1 1992, In : IEEE transactions on circuits and systems. v, n, p. 813-829 17 p.

Research output: Contribution to journalArticle

2 Scopus citations
24 Scopus citations

High-speed VLSI arithmetic processor architectures using hybrid number representation

Srinivas, H. R. & Parhi, K. K., May 1 1992, In : Journal of VLSI Signal Processing. 4, 2-3, p. 177-198 22 p.

Research output: Contribution to journalArticle

17 Scopus citations

Synthesis of Control Circuits in Folded Pipelined DSP Architectures

Parhi, K. K., Wang, C. Y. & Brown, A. P., Jan 1992, In : IEEE Journal of Solid-State Circuits. 27, 1, p. 29-43 15 p.

Research output: Contribution to journalArticle

113 Scopus citations
53 Scopus citations

Video Data Format Converters Using Minimum Number of Registers

Parhi, K. K., Jun 1992, In : IEEE Transactions on Circuits and Systems for Video Technology. 2, 2, p. 255-267 13 p.

Research output: Contribution to journalArticle

8 Scopus citations
1993
2 Scopus citations

A Pipelined Adaptive Lattice Filter Architecture

Shanbhag, N. R. & Parhi, K. K., May 1993, In : IEEE Transactions on Signal Processing. 41, 5, p. 1925-1939 15 p.

Research output: Contribution to journalArticle

17 Scopus citations
20 Scopus citations

Parallel Adaptive Decision Feedback Equalizers

Raghunath, K. J. & Parhi, K. K., May 1993, In : IEEE Transactions on Signal Processing. 41, 5, p. 1956-1961 6 p.

Research output: Contribution to journalArticle

20 Scopus citations
37 Scopus citations

VLSI Architectures for Discrete Wavelet Transforms

Parhi, K. K. & Nishitani, T., Jun 1993, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 1, 2, p. 191-202 12 p.

Research output: Contribution to journalArticle

247 Scopus citations
1994

A C-Testable Carry-Free Divider

Srinivas, H. R., Vinnakota, B. & Parhi, K. K., Dec 1994, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2, 4, p. 472-488 17 p.

Research output: Contribution to journalArticle

1 Scopus citations
11 Scopus citations
21 Scopus citations

Finite-Precision Analysis of the Pipelined ADPCM Coder

Shanbhag, N. R. & Parhi, K. K., May 1994, In : IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 41, 5, p. 364-368 5 p.

Research output: Contribution to journalArticle

2 Scopus citations

Input compression and efficient VLSI architectures for rank order and stack filters

Adams, G. B., Coyle, E. J., Lin, L., Lucke, L. E. & Parhi, K. K., Aug 1994, In : Signal Processing. 38, 3, p. 441-453 13 p.

Research output: Contribution to journalArticle

14 Scopus citations

Parallel Processing Architectures for Rank Order and Stack Filters

Lucke, L. E. & Parhi, K. K., May 1994, In : IEEE Transactions on Signal Processing. 42, 5, p. 1178-1189 12 p.

Research output: Contribution to journalArticle

37 Scopus citations

Pipelining of Lattice IIR Digital Filters

Chung, J. G. & Parhi, K. K., Apr 1994, In : IEEE Transactions on Signal Processing. 42, 4, p. 751-761 11 p.

Research output: Contribution to journalArticle

19 Scopus citations

Sequential and Parallel Neural Network Vector Quantizers

Parhi, K. K., Wu, F. H. & Genesan, K., Jan 1994, In : IEEE Transactions on Computers. 43, 1, p. 104-109 6 p.

Research output: Contribution to journalArticle

4 Scopus citations
1995

100 MHz pipelined RLS adaptive filter

Raghunath, K. J. & Parhi, K. K., Jan 1 1995, In : ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings. 5, p. 3187-3190 4 p.

Research output: Contribution to journalArticle

8 Scopus citations

A Fast Radix-4 Division Algorithm and its Architecture

Srinivas, H. R. & Parhi, K. K., Jun 1995, In : IEEE Transactions on Computers. 44, 6, p. 826-831 6 p.

Research output: Contribution to journalArticle

26 Scopus citations

Determining the minimum iteration period of an algorithm

Ito, K. & Parhi, K. K., Dec 1 1995, In : Journal of VLSI Signal Processing. 11, 3, p. 229-244 16 p.

Research output: Contribution to journalArticle

28 Scopus citations

High-level algorithm and architecture transformations for DSP synthesis

Parhi, K. K., Jan 1 1995, In : Journal of VLSI Signal Processing. 9, 1-2, p. 121-143 23 p.

Research output: Contribution to journalArticle

41 Scopus citations
52 Scopus citations
11 Scopus citations

Low-power FIR digital filter architectures

Pearson, D. N. & Parhi, K. K., Jan 1 1995, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 231-234 4 p.

Research output: Contribution to journalArticle

14 Scopus citations

Pipelined Adaptive DFE Architectures Using Relaxed Look-Ahead

Shanbhag, N. R. & Parhi, K. K., Jun 1995, In : IEEE Transactions on Signal Processing. 43, 6, p. 1368-1385 18 p.

Research output: Contribution to journalArticle

23 Scopus citations

Pipelined Lattice WDF Design for Wideband Filters

Chung, J. G., Kim, H. & Parhi, K. K., Sep 1995, In : IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 42, 9, p. 616-618 3 p.

Research output: Contribution to journalArticle

8 Scopus citations

Resource-constrained loop list scheduler for DSP algorithms

Wang, C. Y. & Parhi, K. K., Oct 1 1995, In : Journal of VLSI Signal Processing. 11, 1-2, p. 75-96 22 p.

Research output: Contribution to journalArticle

13 Scopus citations

Scaled Normalized Lattice Digital Filter Structures

Chung, J. G. & Parhi, K. K., Apr 1995, In : IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 42, 4, p. 278-282 5 p.

Research output: Contribution to journalArticle

6 Scopus citations

Synthesis and pipelining of ladder wave digital filters in digital domain

Chung, J. G. & Parhi, K. K., Jan 1 1995, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 77-80 4 p.

Research output: Contribution to journalArticle

2 Scopus citations

Two VLSI design advances in arithmetic coding

Fu, B. & Parhi, K. K., Jan 1 1995, In : Proceedings - IEEE International Symposium on Circuits and Systems. 2, p. 1440-1443 4 p.

Research output: Contribution to journalArticle

8 Scopus citations
1996
22 Scopus citations