1986 …2021

Research output per year

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Research Output

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Article
2006

On the Optimum Constructions of Composite Field for the AES Algorithm

Zhang, X. & Parhi, K. K., Oct 2006, In : IEEE Transactions on Circuits and Systems II: Express Briefs. 53, 10, p. 1153-1157 5 p.

Research output: Contribution to journalArticle

73 Scopus citations

Parallelization of context-based adaptive binary arithmetic coders

Lin, J. H. & Parhi, K. K., Oct 1 2006, In : IEEE Transactions on Signal Processing. 54, 10, p. 3702-3711 10 p.

Research output: Contribution to journalArticle

11 Scopus citations
2005

A Novel Systolic Array Structure for DCT

Cheng, C. & Parhi, K. K., Jul 5 2005, In : IEEE Transactions on Circuits and Systems II: Express Briefs. 52, 7, p. 366-369 4 p.

Research output: Contribution to journalArticle

43 Scopus citations
38 Scopus citations

Fast factorization architecture in soft-decision Reed-Solomon decoding

Zhang, X. & Parhi, K. K., Apr 1 2005, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 4, p. 413-426 14 p.

Research output: Contribution to journalArticle

30 Scopus citations

High-speed architectures for parallel long BCH encoders

Zhang, X. & Parhi, K. K., Jul 1 2005, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 13, 7, p. 872-877 6 p.

Research output: Contribution to journalArticle

42 Scopus citations
2 Scopus citations
2004
27 Scopus citations
1 Scopus citations

Design of low-error fixed-width modified booth multiplier

Cho, K. J., Lee, K. C., Chung, J. G. & Parhi, K. K., May 1 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 5, p. 522-531 10 p.

Research output: Contribution to journalArticle

125 Scopus citations
69 Scopus citations

High-speed VLSI architectures for the AES algorithm

Zhang, X. & Parhi, K. K., Sep 1 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 9, p. 957-967 11 p.

Research output: Contribution to journalArticle

288 Scopus citations

Joint (3, k)-Regular LDPC Code and Decoder/Encoder Design

Zhang, T. & Parhi, K. K., Apr 1 2004, In : IEEE Transactions on Signal Processing. 52, 4, p. 1065-1079 15 p.

Research output: Contribution to journalArticle

59 Scopus citations

Low-latency architectures for high-throughput rate Viterbi decoders

Kong, J. J. & Parhi, K. K., Jun 1 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 6, p. 642-651 10 p.

Research output: Contribution to journalArticle

13 Scopus citations

On the better protection of short-frame turbo codes

Chi, Z., Wang, Z. & Parhi, K. K., Sep 1 2004, In : IEEE Transactions on Communications. 52, 9, p. 1435-1439 5 p.

Research output: Contribution to journalArticle

2 Scopus citations

On The Performance/Complexity Tradeoff in Block Turbo Decoder Design

Chi, Z., Song, L. & Parhi, K. K., Feb 1 2004, In : IEEE Transactions on Communications. 52, 2, p. 173-175 3 p.

Research output: Contribution to journalArticle

17 Scopus citations

Overlapped message passing for quasi-cyclic low-density parity check codes

Chen, Y. & Parhi, K. K., Jun 1 2004, In : IEEE Transactions on Circuits and Systems I: Regular Papers. 51, 6, p. 1106-1113 8 p.

Research output: Contribution to journalArticle

123 Scopus citations

Parallel turbo decoding

Zhang, Y. & Parhi, K. K., Sep 7 2004, In : Proceedings - IEEE International Symposium on Circuits and Systems. 2

Research output: Contribution to journalArticle

27 Scopus citations

Pipelined CORDIC-based state-space orthogonal recursive digital filters using matrix look-ahead

Ma, J. & Parhi, K. K., Jul 1 2004, In : IEEE Transactions on Signal Processing. 52, 7, p. 2102-2119 18 p.

Research output: Contribution to journalArticle

7 Scopus citations
7 Scopus citations

Small area parallel chien search architectures for long BCH codes

Chen, Y. & Parhi, K. K., May 1 2004, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 12, 5, p. 545-549 5 p.

Research output: Contribution to journalArticle

58 Scopus citations
2003

A low power correlator for CDMA wireless systems

Sahoo, B. & Parhi, K. K., Aug 1 2003, In : Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 35, 1, p. 105-112 8 p.

Research output: Contribution to journalArticle

An efficient pipelined FFT architecture

Chang, Y. N. & Parhi, K. K., Jun 1 2003, In : IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 50, 6, p. 322-325 4 p.

Research output: Contribution to journalArticle

64 Scopus citations

An FPGA implementation of (3,6)-regular low-density parity-check code decoder

Zhang, T. & Parhi, K. K., May 1 2003, In : Eurasip Journal on Applied Signal Processing. 2003, 6, p. 530-542 13 p.

Research output: Contribution to journalArticle

22 Scopus citations

Digit-serial complex-number multipliers on FPGAs

Sansaloni, T., Valls, J. & Parhi, K. K., Jan 1 2003, In : Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 33, 1-2, p. 105-115 11 p.

Research output: Contribution to journalArticle

3 Scopus citations

High performance, high throughput turbo/SOVA decoder design

Wang, Z. & Parhi, K. K., Apr 1 2003, In : IEEE Transactions on Communications. 51, 4, p. 570-579 10 p.

Research output: Contribution to journalArticle

37 Scopus citations

Interleaved convolutional code and its Viterbi decoder architecture

Kong, J. J. & Parhi, K. K., Dec 1 2003, In : Eurasip Journal on Applied Signal Processing. 2003, 13, p. 1328-1334 7 p.

Research output: Contribution to journalArticle

5 Scopus citations

Low-complexity decoding of block turbo-coded system with antenna diversity

Chen, Y. & Parhi, K. K., Dec 1 2003, In : Eurasip Journal on Applied Signal Processing. 2003, 13, p. 1335-1345 11 p.

Research output: Contribution to journalArticle

Low Error Fixed-Width CSD Multiplier with Efficient Sign Extension

Kim, S. M., Chung, J. G. & Parhi, K. K., Dec 1 2003, In : IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing. 50, 12, p. 984-993 10 p.

Research output: Contribution to journalArticle

40 Scopus citations

Relaxed annihilation-reordering look-ahead QRD-RLS adaptive filters

Gao, L., Parhi, K. K. & Ma, J., Sep 1 2003, In : Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 35, 2, p. 119-135 17 p.

Research output: Contribution to journalArticle

1 Scopus citations

Synthesis of minimum-area folded architectures for rectangular multidimensional multirate DSP systems

Sundararajan, V. & Parhi, K. K., Jul 1 2003, In : IEEE Transactions on Signal Processing. 51, 7, p. 1954-1965 12 p.

Research output: Contribution to journalArticle

4 Scopus citations
2002

Area-efficient high-speed decoding schemes for turbo decoders

Wang, Z., Chi, Z. & Parhi, K. K., Dec 1 2002, In : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 10, 6, p. 902-912 11 p.

Research output: Contribution to journalArticle

46 Scopus citations

Design of low error CSD fixed-width multiplier

Kim, S. M., Chung, J. G. & Parhi, K. K., Jan 1 2002, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1

Research output: Contribution to journalArticle

13 Scopus citations

Energy efficient signaling in deep-submicron technology

Dhaou, I. B., Parhi, K. K. & Tenhunen, H., Jan 1 2002, In : VLSI Design. 15, 3, p. 563-586 24 p.

Research output: Contribution to journalArticle

3 Scopus citations

Evaluation of CORDIC algorithms for FPGA design

Valls, J., Kuhlmann, M. & Parhi, K. K., Nov 2002, In : Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 32, 3, p. 207-222 16 p.

Research output: Contribution to journalArticle

55 Scopus citations

Fast and exact transistor sizing based on iterative relaxation

Sundararajan, V., Sapatnekar, S. S. & Parhi, K. K., May 1 2002, In : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 21, 5, p. 568-581 14 p.

Research output: Contribution to journalArticle

52 Scopus citations

Frequency spectrum based low-area low-power parallel FIR filter design

Chung, J. G. & Parhi, K. K., Sep 1 2002, In : Eurasip Journal on Applied Signal Processing. 2002, 9, p. 944-953 10 p.

Research output: Contribution to journalArticle

40 Scopus citations

High-speed add-compare-select units using locally self-resetting CMOS

Jung, G., Kong, J. J., Sobelman, G. E. & Parhi, K. K., Jan 1 2002, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 889-892 4 p.

Research output: Contribution to journalArticle

10 Scopus citations
1 Scopus citations

High speed VLSI architecture design for block turbo decoder

Chi, Z. & Parhi, K. K., Jan 1 2002, In : Proceedings - IEEE International Symposium on Circuits and Systems. 1, p. 901-904 4 p.

Research output: Contribution to journalArticle

9 Scopus citations

Implementation approaches for the advanced encryption standard algorithm

Xinmiao, Z. & Parhi, K. K., Dec 1 2002, In : IEEE Circuits and Systems Magazine. 2, 4, p. 24-46 23 p.

Research output: Contribution to journalArticle

83 Scopus citations
5 Scopus citations

P-CORDIC: A precomputation based rotation CORDIC algorithm

Kuhlmann, M. & Parhi, K. K., Sep 1 2002, In : Eurasip Journal on Applied Signal Processing. 2002, 9, p. 936-943 8 p.

Research output: Contribution to journalArticle

31 Scopus citations

Performance-scalable array architectures for modular multiplication

Freking, W. L. & Parhi, K. K., Jun 1 2002, In : Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 31, 2, p. 101-116 16 p.

Research output: Contribution to journalArticle

4 Scopus citations
2001

Approaches to low-power implementations of DSP systems

Parhi, K. K., Oct 1 2001, In : IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications. 48, 10, p. 1214-1224 11 p.

Research output: Contribution to journalArticle

15 Scopus citations

A unified adder design

Wang, Y. & Parhi, K. K., Jan 1 2001, In : Conference Record of the Asilomar Conference on Signals, Systems and Computers. 1, p. 177-182 6 p.

Research output: Contribution to journalArticle

2 Scopus citations

A unified algebraic transformation approach for parallel recursive and adaptive filtering and svd algorithms

Ma, J., Parhi, K. K. & Deprettere, E. F., Feb 1 2001, In : IEEE Transactions on Signal Processing. 49, 2, p. 424-437 14 p.

Research output: Contribution to journalArticle

11 Scopus citations
1 Scopus citations