20092022
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Research Output 2009 2018

  • 32 Conference contribution
  • 10 Article
  • 2 Conference article
  • 1 Review article
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Conference contribution
2018
1 Citation (Scopus)

Enhancing workload-dependent voltage scaling for energy-efficient ultra-low-power embedded systems

Mohan, V., Iyer, A. & Sartori, J., Jun 24 2018, Proceedings of the 55th Annual Design Automation Conference, DAC 2018. Institute of Electrical and Electronics Engineers Inc., a42. (Proceedings - Design Automation Conference; vol. Part F137710).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy Efficient
Embedded systems
Embedded Systems
Power System
Workload
2017

Approximate compression – Enhancing compressibility rough data approximation

Suresh, H., Hegde, S. & Sartori, J. M., Oct 15 2017, Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2017. Stuijk, S. & Kumar, A. (eds.). Association for Computing Machinery, Inc, p. 41-50 10 p. (Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, ESTIMedia 2017).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Compressibility
Compaction
Communication
Bandwidth
Data compression
10 Citations (Scopus)

Bespoke processors for applications with ultra-low area and power constraints

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J. M., Jun 24 2017, ISCA 2017 - 44th Annual International Symposium on Computer Architecture - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 41-54 14 p. (Proceedings - International Symposium on Computer Architecture; vol. Part F128643).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Microcontrollers
Microprocessor chips
Electronic equipment
Degradation
Costs
8 Citations (Scopus)

Determining application-specific peak power and energy requirements for ultra-low power processors

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J. M., Apr 4 2017, ASPLOS 2017 - 22nd International Conference on Architectural Support for Programming Languages and Operating Systems. Association for Computing Machinery, p. 3-16 14 p. (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS; vol. Part F127193).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Sensor networks
Costs
Hardware
Internet of things
1 Citation (Scopus)

Enabling Effective Module-Oblivious Power Gating for Embedded Processors

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J. M., May 5 2017, Proceedings - 2017 IEEE 23rd Symposium on High Performance Computer Architecture, HPCA 2017. IEEE Computer Society, p. 157-168 12 p. 7920822. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Hardware
Costs
Power management
1 Citation (Scopus)

Scalable N-worst algorithms for dynamic timing and activity analysis

Cherupalli, H. & Sartori, J. M., Dec 13 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2017. Institute of Electrical and Electronics Engineers Inc., Vol. 2017-November. p. 585-592 8 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dynamic analysis
Electronic design automation
3 Citations (Scopus)

Software-based gate-level information flow security for IoT systems

Cherupalli, H., Duwe, H., Ye, W., Kumar, R. & Sartori, J. M., Oct 14 2017, MICRO 2017 - 50th Annual IEEE/ACM International Symposium on Microarchitecture Proceedings. IEEE Computer Society, p. 328-340 13 p. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; vol. Part F131207).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Security of data
Internet of things
Microprocessor chips
Computer systems
Internet
2016
2 Citations (Scopus)

Automated error prediction for approximate sequential circuits

Kapare, A., Cherupalli, H. & Sartori, J. M., Nov 7 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2016. Institute of Electrical and Electronics Engineers Inc., 2967007. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD; vol. 07-10-November-2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Sequential circuits
Networks (circuits)
Error statistics
Scalability
Hardware
18 Citations (Scopus)

Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems

Cherupalli, H., Kumar, R. & Sartori, J., Aug 24 2016, Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016. Institute of Electrical and Electronics Engineers Inc., p. 671-681 11 p. 7551431. (Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Embedded systems
Energy efficiency
Embedded software
Costs
Application specific integrated circuits
1 Citation (Scopus)

GPU-Accelerated nick local image thresholding algorithm

Najafi, M. H., Murali, A., Lilja, D. J. & Sartori, J., Jan 15 2016, Proceedings - 2015 IEEE 21st International Conference on Parallel and Distributed Systems, ICPADS 2015. IEEE Computer Society, p. 576-584 9 p. 7384341. (Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS; vol. 2016-January).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Image processing
Graphics processing unit
6 Citations (Scopus)

Graph-based dynamic analysis: Efficient characterization of dynamic timing and activity distributions

Cherupalli, H. & Sartori, J. M., Jan 5 2016, 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015. Institute of Electrical and Electronics Engineers Inc., p. 729-735 7 p. 7372642. (2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Dynamic analysis
Data storage equipment
2015
1 Citation (Scopus)

Software canaries: Software-based path delay fault testing for variation-aware energy-efficient design

Sartori, J. M. & Kumar, R., Oct 13 2015, Proceedings of the 2014 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2014. Institute of Electrical and Electronics Engineers Inc., Vol. 2015-October. p. 159-164 6 p. 7298242

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Testing
Defects
2014
3 Citations (Scopus)

Automated algorithmic error resilience for structured grid problems based on outlier detection

Suresh, A. & Sartori, J. M., Jan 1 2014, Proceedings of the 12th ACM/IEEE International Symposium on Code Generation and Optimization, CGO 2014. Association for Computing Machinery, p. 240-250 11 p. (Proceedings of the 12th ACM/IEEE International Symposium on Code Generation and Optimization, CGO 2014).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error Resilience
Outlier Detection
Grid
Metric
Parameterise
2013
28 Citations (Scopus)

Low-power, Low-storage-overhead chipkill correct via Multi-line error correction

Jian, X., Duwe, H., Sartori, J., Sridharan, V. & Kumar, R., Jan 1 2013, Proceedings of SC 2013: The International Conference for High Performance Computing, Networking, Storage and Analysis. IEEE Computer Society, 24. (International Conference for High Performance Computing, Networking, Storage and Analysis, SC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error correction
Error detection
Data storage equipment
Servers
Costs
22 Citations (Scopus)

Statistical analysis and modeling for error composition in approximate computation circuits

Chan, W. T. J., Kahng, A. B., Kang, S., Kumar, R. & Sartori, J. M., Jan 1 2013, 2013 IEEE 31st International Conference on Computer Design, ICCD 2013. IEEE Computer Society, p. 47-53 7 p. 6657024. (2013 IEEE 31st International Conference on Computer Design, ICCD 2013).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Statistical methods
Hardware
Networks (circuits)
Chemical analysis
Table lookup
2012
14 Citations (Scopus)

Compiling for energy efficiency on timing speculative processors

Sartori, J. & Kumar, R., Jul 11 2012, Proceedings of the 49th Annual Design Automation Conference, DAC '12. p. 1301-1308 8 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Energy Efficiency
Energy efficiency
Timing
Speculation
Binary
7 Citations (Scopus)

On software design for stochastic processors

Sloan, J., Sartori, J. & Kumar, R., Jul 11 2012, Proceedings of the 49th Annual Design Automation Conference, DAC '12. p. 918-923 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Software Design
Software design
Correctness
Energy
Tolerance
13 Citations (Scopus)

Power balanced pipelines

Sartori, J., Ahrens, B. & Kumar, R., May 3 2012, Proceedings - 18th IEEE International Symposium on High Performance Computer Architecture, HPCA - 18 2012. p. 261-272 12 p. 6169032. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Pipelines
Throughput
Electric power utilization
Electric potential
2011
14 Citations (Scopus)

Architecting processors to allow voltage/reliability tradeoffs

Sartori, J. & Kumar, R., Nov 21 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11. p. 115-124 10 p. (Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Energy conservation
Networks (circuits)
31 Citations (Scopus)

On the efficacy of NBTI mitigation techniques

Chan, T. B., Sartori, J., Gupta, P. & Kumar, R., May 31 2011, Proceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011. p. 932-937 6 p. 5763151. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Degradation
Negative bias temperature instability
Numerical models
Analytical models
Aging of materials
36 Citations (Scopus)

Stochastic computing: Embracing errors in architecture and design of processors and applications

Sartori, J., Sloan, J. & Kumar, R., Nov 21 2011, Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11. p. 135-144 10 p. (Embedded Systems Week 2011, ESWEEK 2011 - Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES'11).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Hardware
Innovation
Semiconductor materials
Uncertainty
2010
54 Citations (Scopus)

Designing a processor from the ground up to allow voltage/reliability tradeoffs

Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., May 27 2010, HPCA-16 2010 - The 16th International Symposium on High-Performance Computer Architecture. 5416652. (Proceedings - International Symposium on High-Performance Computer Architecture).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Knobs
Electric power utilization
Voltage scaling
Experiments

Energy-efficient architectures for timing error-tolerant processors

Sartori, J. & Kumar, R., Dec 1 2010, 2010 International Conference on Energy Aware Computing, ICEAC 2010. 5702294. (2010 International Conference on Energy Aware Computing, ICEAC 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Error Resilience
Energy Efficient
Timing
Maximise
Architectural Design
18 Citations (Scopus)

Low-overhead, high-speed multi-core barrier synchronization

Sartori, J. & Kumar, R., Mar 25 2010, High Performance Embedded Architectures and Compilers - 5th International Conference, HiPEAC 2010, Proceedings. p. 18-34 17 p. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); vol. 5952 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Synchronization
High Speed
Hardware
Latency
Costs
5 Citations (Scopus)

Optimal power/Performance pipelining for error resilient processors

Zea, N., Sartori, J., Ahrens, B. & Kumar, R., Dec 1 2010, 2010 IEEE International Conference on Computer Design, ICCD 2010. p. 356-363 8 p. 5647702. (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Pipelines
Energy efficiency
Networks (circuits)
Electric potential
Analytical models
7 Citations (Scopus)

Overscaling-friendly timing speculation architectures

Sartori, J. & Kumar, R., Jul 16 2010, GLSVLSI'10 - Proceedings of the Great Lakes Symposium on VLSI 2010. p. 209-214 6 p. (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Electric potential
Networks (circuits)
Energy dispersive spectroscopy
Electric power utilization
Pipelines
45 Citations (Scopus)

Recovery-driven design: A power minimization methodology for error-tolerant processor modules

Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., Sep 7 2010, Proceedings of the 47th Design Automation Conference, DAC '10. p. 825-830 6 p. (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Recovery
Error Recovery
Error Rate
Module
Methodology
92 Citations (Scopus)

Scalable stochastic processors

Narayanan, S., Sartori, J., Kumar, R. & Jones, D. L., Jun 9 2010, DATE 10 - Design, Automation and Test in Europe. p. 335-338 4 p. 5457181. (Proceedings -Design, Automation and Test in Europe, DATE).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Microprocessor chips
Scalability
Electric power utilization
Hardware
Electric potential
95 Citations (Scopus)

Slack redistribution for graceful degradation under voltage overscaling

Kahng, A. B., Kang, S., Kumar, R. & Sartori, J., Apr 28 2010, 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010. p. 825-831 7 p. 5419690. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Degradation
Electric potential
Microprocessor chips
Electric power utilization
Voltage scaling
22 Citations (Scopus)

Variation-aware speed binning of multi-core processors

Sartori, J., Pant, A., Kumar, R. & Gupta, P., May 28 2010, Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010. p. 307-314 8 p. 5450442. (Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Curve fitting
Throughput
Silicon
Experiments
2009
25 Citations (Scopus)

Distributed peak power management for many-core architectures

Sartori, J. & Kumar, R., Oct 22 2009, Proceedings - 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09. p. 1556-1559 4 p. 5090910

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Explosions
Decision making
Throughput
Power management
12 Citations (Scopus)

Three scalable approaches to improving many-core throughput for a given peak power budget

Sartori, J. & Kumar, R., Dec 1 2009, 16th International Conference on High Performance Computing, HiPC 2009 - Proceedings. p. 89-98 10 p. 5433221. (16th International Conference on High Performance Computing, HiPC 2009 - Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Many-core
Power Management
Throughput
Die
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