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Research Output

  • 3 Paper
  • 1 Conference contribution
  • 1 Article
1997

Codesign environment supporting hardware/software modeling at different levels of detail

Kumar, S. & Rose, F. A., Jan 1 1997, p. 115-119. 5 p.

Research output: Contribution to conferencePaper

1 Scopus citations

Performance Modeling of System Architectures

Rose, F. A., Shackleton, J. & Hein, C., Dec 1 1997, In : Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. 15, 1-2, p. 97-109 13 p.

Research output: Contribution to journalArticle

2 Scopus citations
1996

Model for the coanalysis of hardware and software architectures

Rose, F., Carpenter, T., Kumar, S., Shackleton, J. & Steeves, T., Jan 1 1996, p. 94-103. 10 p.

Research output: Contribution to conferencePaper

5 Scopus citations
1995

Soft breadboard for real-time 3D rendering

Johnson, M., Rogers, C., Hancock, W., Rose, F., Spaanenburg, H., Carpenter, T., Dietrich, P. & Ghrayeb, J., Jan 1 1995, p. 471-482. 12 p.

Research output: Contribution to conferencePaper

1984

APPLICATION OF A HIERARCHICAL LAYOUT SYSTEM TO VLSI.

Rose, F., Dec 1 1984, Unknown Host Publication Title. IEEE, p. 125-127 3 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations