We developed an algorithm, Selection of Approximate Bits for the Design of Error Tolerant Circuits (SABER), to generate an approximate circuit with the aim of maximizing the number of approximate bits in a circuit (which translates to power/area minimization) so that it uses minimal resources under a specified error budget. Our work demonstrates results on fixed-point integer arithmetic operations. The key ingredient of any methodology based on approximate design is an accurate quantification of the error injected into a computation by the approximation scheme. We use the variance of this error as the error metric to be constrained within a user-specified budget. We use an analytical expression of this error variance as a function of the total approximation in a circuit.
|Date made available||2017|
|Publisher||Data Repository for the University of Minnesota|